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Denver, CO|Sheraton Denver
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RIC session focuses on interagency collaboration
Attendees at last week’s 2026 Regulatory Information Conference, hosted by the Nuclear Regulatory Commission, saw extensive discussion of new reactor technologies, uprates, fusion, multiunit deployments, supply chain, and much more.
With the industry in a state of rapid evolution, there was much to discuss. Connected to all these topics was one central theme: the ongoing changes at the NRC. With massively shortened timelines, the ADVANCE Act and Executive Order 14300, and new interagency collaboration and authorization pathways in mind, speakers spent much of the RIC exploring what the road ahead looks like for the NRC.
Y. Y. Azmy, B. L. Kirk
Nuclear Science and Engineering | Volume 120 | Number 1 | May 1995 | Pages 1-17
Technical Paper | doi.org/10.13182/NSE95-A24102
Articles are hosted by Taylor and Francis Online.
Mathematical performance models are developed for the parallel algorithm used to solve the neutron diffusion equation on message passing and shared memory multiprocessors represented by the Intel iPSC/860 and the Sequent Balance 8000, respectively. The performance models are validated through several test problems, and these models are used to estimate the performance of each of the two considered architectures in situations typical of practical applications, such as fine meshes and a large number of participating processors. While message passing computers are capable of producing speedup, the parallel efficiency deteriorates rapidly as the number of processors increases. Furthermore, the speedup fails to improve appreciably for massively parallel computers so that only small- to medium-sized message passing multiprocessors offer a reasonable platform for this algorithm. In contrast, the performance model for the shared memory architecture predicts very high efficiency over a wide range of number of processors reasonable for this architecture. Furthermore, the model efficiency of the Sequent remains superior to that of the hypercube if its model parameters are adjusted to make its processors as fast as those of the iPSC/860. It is concluded that shared memory computers are better suited for this parallel algorithm than message passing computers.