In this work, the machine learning method is proposed to optimize the layout of key chips of the nuclear safety control system, so as to reduce the steady-state operating temperature of the central processing unit (CPU) and field programmable gate array (FPGA) on the main control printed circuit board. First, the steady-state chip temperatures of the control protection cabinet under the ambient temperature of 55°C are tested, and then the test process is simulated using finite element analysis.

Subsequently, the steady-state temperatures of the CPU and FPGA in 100 groups of random chip configurations are calculated based on the finite element model, and the chip temperature prediction model is accordingly constructed using the multioutput support vector regression (M-SVR) algorithm. Then, three different machine learning algorithms, i.e. particle swarm optimization (PSO) algorithm, genetic algorithm (GA), and dual annealing optimization (DAO) algorithm, are used to calculate the chip position coordinates for the lowest temperature rise. Furthermore, finite element analysis is used to calculate the steady-state temperature of the chip in this position coordinate.

The results show that the finite element model can accurately calculate the operating temperature of CPU and FPGA at the ambient temperature of 55°C, suggesting that the finite element model can reflect the test phenomenon well. The M-SVR model can accurately predict the steady-state temperature of different chip layouts. By comparing the PSO algorithm, GA algorithm, and DAO algorithm, it is found that the DAO algorithm has the best performance and has significant advantages in optimization efficiency and performance. After the chip layout optimization, the steady-state temperature of the CPU and FPGA decreased by 2.1°C and 2°C, respectively. The chip layout optimization method proposed in this study is helpful to improving the temperature rise of the chips during operation and the reliability of the nuclear safety control system.