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Fusion Science and Technology
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In transition: Commercializing fusion power
Commercial fusion power is closer than ever. There are now around 30 U.S. fusion companies, several of which claim to be on track to connect to the grid as early as the 2030s.
Tokamak and laser inertial confinement approaches benefit from decades of research at facilities such as the National Ignition Facility (NIF) at Lawrence Livermore National Laboratory and ITER, with alternative concepts including stellarator, magnetic mirror, and Z-pinch confinement also making notable progress as private and government funding for fusion increases.
Y. Y. Azmy, B. L. Kirk
Nuclear Science and Engineering | Volume 120 | Number 1 | May 1995 | Pages 1-17
Technical Paper | doi.org/10.13182/NSE95-A24102
Articles are hosted by Taylor and Francis Online.
Mathematical performance models are developed for the parallel algorithm used to solve the neutron diffusion equation on message passing and shared memory multiprocessors represented by the Intel iPSC/860 and the Sequent Balance 8000, respectively. The performance models are validated through several test problems, and these models are used to estimate the performance of each of the two considered architectures in situations typical of practical applications, such as fine meshes and a large number of participating processors. While message passing computers are capable of producing speedup, the parallel efficiency deteriorates rapidly as the number of processors increases. Furthermore, the speedup fails to improve appreciably for massively parallel computers so that only small- to medium-sized message passing multiprocessors offer a reasonable platform for this algorithm. In contrast, the performance model for the shared memory architecture predicts very high efficiency over a wide range of number of processors reasonable for this architecture. Furthermore, the model efficiency of the Sequent remains superior to that of the hypercube if its model parameters are adjusted to make its processors as fast as those of the iPSC/860. It is concluded that shared memory computers are better suited for this parallel algorithm than message passing computers.